Branch predictor

Results: 107



#Item
61Central processing unit / Microprocessors / Parallel computing / Threads / CPU cache / Multithreading / Instruction-level parallelism / Branch predictor / Multi-core processor / Computing / Computer architecture / Computer hardware

Improving Memory Latency Aware Fetch Policies for SMT Processors Francisco J. Cazorla1 , Enrique Fernandez2 , Alex Ram´ırez1 , and Mateo Valero1 1 2

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Source URL: personals.ac.upc.edu

Language: English - Date: 2005-05-12 12:36:37
62Branch predictor / Instruction set architectures / CPU cache / Parallel computing / Automatic parallelization / Central processing unit / X86 / Speculative execution / Computer architecture / Computing / Computer hardware

ASC: Automatically Scalable Computation Amos Waterland Elaine Angelino Ryan P. Adams Jonathan Appavoo

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Source URL: www.eecs.harvard.edu

Language: English - Date: 2014-03-30 22:04:09
63Central processing unit / Cache / Computer memory / Compiler optimizations / CPU cache / Computer performance / Branch predictor / Parallel computing / Automatic parallelization / Computing / Computer hardware / Computer architecture

Computational Caches Amos Waterland1 Elaine Angelino1 Ekin D. Cubuk1 Efthimios Kaxiras2,1 Ryan P. Adams1 Jonathan Appavoo3 Margo Seltzer1 1 School of Engineering and Applied Sciences, Harvard University

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Source URL: www.eecs.harvard.edu

Language: English - Date: 2014-03-30 22:04:13
64Central processing unit / Instruction set architectures / X86 architecture / Assembly languages / Microcode / Emulator / X86 / CPU cache / Branch predictor / Computer architecture / Computing / Computer hardware

Fast Microcode Interpretation with Transactional Commit/Abort Jens Tr¨oger Darek Mihoˇcka Pardo

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Source URL: www.emulators.com

Language: English - Date: 2013-08-18 08:51:33
65Central processing unit / Instruction set architectures / X86 architecture / Assembly languages / Microcode / Emulator / X86 / CPU cache / Branch predictor / Computer architecture / Computing / Computer hardware

Fast Microcode Interpretation with Transactional Commit/Abort Jens Tr¨oger Darek Mihoˇcka Pardo

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Source URL: amas-bt.ece.utexas.edu

Language: English - Date: 1980-01-01 01:00:00
66Central processing unit / Parallel computing / Classes of computers / Firmware / Microcode / Microarchitecture / Branch predictor / Delay slot / Software pipelining / Computer architecture / Computing / Computer engineering

ESCAPE : Environment for the Simulation of Computer Architectures for the Purpose of Education Jan Van Campenhout Peter Verplaetse ∗ Henk Neefs Department of Electronics and Information Systems

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Source URL: www.ncsu.edu

Language: English - Date: 2003-06-06 00:00:12
67Central processing unit / Classes of computers / Register renaming / Software pipelining / CPU cache / Branch predictor / Microarchitecture / Reduced instruction set computing / Pentium Pro / Computer architecture / Computer hardware / Computer engineering

Software Pipelining for (i=1, i<100, i++) { An alternative method of reorganizing loops

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Source URL: homepage.cs.uiowa.edu

Language: English - Date: 2006-03-28 11:52:24
68Formal sciences / Branch predictor / Randomness / Instruction set architectures / Alpha 21264 / Entropy / Hysteresis / Counter / DEC Alpha / Computer architecture / Electronic engineering / Information

Journal of Instruction-Level Parallelism[removed]Submitted 2/02; published 6/03

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Source URL: www.jilp.org

Language: English - Date: 2003-07-07 11:59:46
69Alpha 21264 / Data type / Lookup table / Trie / Central processing unit / Regression analysis / Computing / Branch predictor / Computer programming

Journal of Instruction-Level Parallelism[removed]Submitted 9/03; published 11/03

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Source URL: www.jilp.org

Language: English - Date: 2004-01-21 11:43:54
70Branch predictor / Prediction / Science

Register Value Prediction using Metapredictors Lucian N. Vintan, Arpad Gellert and Adrian Florea “Lucian Blaga” University of Sibiu, Computer Science Department, Str. E. Cioran, No. 4, Sibiu[removed], ROMANIA,

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Source URL: webspace.ulbsibiu.ro

Language: English - Date: 2005-12-13 09:40:43
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